1. Field of the Invention
This invention relates to methods of providing protection to the upper surfaces of integrated (IC) chips, particularly those having input/output terminals, which project above the upper surface of the chip and IC chips provided with such protective layers. The purpose of the protective layer is to protect the upper surface of the chip from physical damage as the result of the subsequent handling and testing, encountered in incorporating them into electronic systems.
2. Description of the Prior Art
The development of integrated circuit chips, particularly medium and large scale integrated circuit chips, has led to new ways of handling and packaging or mounting them so that they can be assembled to provide functional circuits in electronic subsystems of digital data processing computers, for example. To facilitate handling and packaging such chips each chip is bonded to a lead frame, which lead frames are formed on relatively long tape-like carriers such as standard motion picture film. IC chips bonded to lead frames formed on such carriers are provided with I/O terminals, or bumps, which are welded or soldered to the free ends of the individual leads of each flexible lead frame. An IC chip and a portion of its lead frame is then excised from the segment of the film strip to which the frame is attached, the leads are formed, and the chip and its formed leads are mounted on a ceramic substrate of a reasonable size, from one square inch to sixteen square inches, for example, with large numbers of IC chips, up to one hundred, being mounted on one such substrate having an area of substantially nine square inches. IC chips mounted on substrates in this way are not encapsulated or provided with an individual protective housing as they are when handled as discrete components.
It is standard practice in the semiconductor industry to protect the upper surface of each IC chip with a thin layer of SiO.sub.2, or protective glass, which is quite thin, on the order of 1 to 3 microns in thickness. A reason why protective glass coatings are made so thin is to permit I/O openings to be etched through the glass whenever an I/O terminal is to be connected to an underlying conductor. In addition, increasing the thickness of the glass layer increases the stresses between the glass layer and the underlying material due to differences in their thermal coefficients of expansion.
Some IC chips are provided with input/output terminals, or bumps, preferably made of gold, which project a substantial distance above the layer of glass, on the order of from 15 to 26 microns. It is of course desirable that the outer surfaces of the bumps be substantially coplanar with the outer surface of the chip, to facilitate automating the process of bonding leads to said bumps. It is also necessary that the outer surface of the bumps be clean so that a good bond, or solder joint, between a bump and its lead can be produced reliably and economically.
To minimize damage to the protective glass layer, the prior art, as known to Applicants, has developed thin resilient coatings which have heretofore been produced using photolithographic techniques. Some of the problems attendant with photo techniques for establishing protective layers are the result of the chemicals used in the process, solvents, and strippers. Further, only a limited number of materials are compatible with photolithographic techiques. In addition, the thickness of the protective layers is limited by the photolithographic process substantially to that of the protective glass layer which does not protect the glass, or passivation, layer from physical damage as well as a thicker layer. The reason such photolithographic techniques have been used in the past is that it is essential that the I/O terminals or bumps of IC chips not be covered or contaminated by any such protective layer, otherwise reliable connection of leads to the terminals of an IC chip cannot be produced.
A problem associated with manufacturing electronic systems using bumped chips bonded to flexible beam leads on a tape carrier and subsequently excising them from the tape and mounting them on a substrate is that each chip must go through a number of manufacturing steps from the time the bumps are formed in the process of manufacturing the chips, which is normally before the chips are separated from one another, until they are mounted on a substrate and the substrate is mounted in an electronic system. During any one of these steps the very thin layer of protective glass is easily damaged by chip-to-chip impact, tweezers, and probes. Because of the thinness of the glass layer, a very small force will produce cracks in or damage to the glass layer. This damage can trap contaminants which may be corrosive to the underlying metal layer, normally aluminum, and such contaminants can also serve as condensation nuclei for water vapor that may condense on the chips. Cracks in the protective glass layer can also be transmitted to the metal underlying the glass which in turn can crack or lift from the silicon substrate of the IC chip. Any of these occurrences can chemically or mechanically degrade the metal layer of the chip. There is evidence that about half of the electrical failures associated with aluminum corrosion of the metallized layer of IC chips are the result of a scratch or crack in the protective glass layer. Additional layers of protective material that heretofore have been applied to protect such a glass layer have been too thin because of the techniques of applying them and the need to keep the I/O terminals clean and accessible. As a result they provide little if any improvement in resistance of the glass coating to being cracked during manufacturing from the time the bumps are formed until the IC chip is mounted on a substrate.